charm AT lists.siebelschool.illinois.edu
Subject: Charm++ parallel programming system
List archive
- From: Nikhil Jain <nikhil.jain AT acm.org>
- To: Tom Quinn <trq AT astro.washington.edu>, "charm AT cs.uiuc.edu" <charm AT cs.uiuc.edu>
- Cc: Nikhil Jain <nikhil.life AT gmail.com>
- Subject: Re: [charm] pemap for hardware threads
- Date: Thu, 28 Jul 2016 22:24:41 -0700
+pemap 0-67+68+136+204 may generate the desired mapping.
On 7/28/16, 22:00, "Tom Quinn"
<trq AT astro.washington.edu>
wrote:
>When using hardware threads, it seems to be beneficial to have adjacent
>charm PE numbers on the same physical core, but the layout of the cores
>on
>Intel platforms puts adjacent core numbers on different physical cores.
>Therefore, I'd like a "+pemap" that does the following: (e.g. on a chip
>with 68 physical cores and 4 HW threads/core)
>PE 0 : core 0
>PE 1 : core 68
>PE 2 : core 136
>PE 3: core 204
>PE 4: core 1
>PE 5: core 69
>PE 6: core 137
>PE 7: core 205
>...
>PE 272 : core 0 (on node 1)
>PE 273: core 68 (on node 1)
>...
>
>I tried the following: +pemap 0-271+68+136+204
>which works for one node, but on the 2nd node it attempts to place PEs on
>cores greater than 271, which causes an abort.
>
>Thanks,
>
>Tom
>
- [charm] pemap for hardware threads, Tom Quinn, 07/29/2016
- Re: [charm] pemap for hardware threads, Nikhil Jain, 07/29/2016
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